A 330MHz 11Bit 26.4mW CMOS Low-Hold-Pedestal Fully Differential Track-and-Hold Circuit

摘要

A new technique for realizing a very-high-speed low-power low-voltage CMOS fully differential track-and-hold circuit with low hold pedestal is presented. To achieve high sampling linearity the circuit utilizes linearized input switch. The fully differential design relaxes the trade-off between sampling speed and the sampling precision. The circuit design of major building blocks is described in detailed. A prototype circuit in a 0.35-μm CMOS process is integrated and experimental results are presented.