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New Design Method of Low Power Over Current Protection Circuit for Low Dropout Regulator

机译:低压损耗稳压器电流保护电路的新设计方法

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In this paper, a low power current protection circuit implemented in LDOs is presented. The proposed circuit, designed in 0.35μm CMOS process, provides a precise limiting current as well as holding current with low dependency on both supply voltage and regulator output voltage. The experimental results showed the proposed circuit is operable in the regulator output voltage range VOUT = 1.2V to VOUT = 3.6V and supply voltage range VDD = VOUT + 0.5V to VDD = 5.6V. Since the proposed circuit is composed of few simple basic circuits such as comparator, Schmitt Trigger, it has a low current consumption which is less than ISS = 0.82μA at load current ILOAD = 200mA. This makes the circuit suitable for low power and low voltage LDO design.
机译:本文介绍了在LDOS中实现的低功率电流保护电路。所提出的电路,设计在0.35μmCMOS工艺中,提供精确的限制电流,以及对电源电压和调节器输出电压的低依赖性的保持电流。实验结果表明,所提出的电路可操作于调节器输出电压范围VOUT = 1.2V至VOUT = 3.6V,电源电压范围VDD = 0.5V至VDD = 5.6V。由于所提出的电路由诸如比较器,Schmitt触发器的少数简单的基本电路组成,因此在负载电流ILoad = 200mA时,它具有低于ISS =0.82μA的低电流消耗。这使得电路适用于低功耗和低压LDO设计。

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