Flexible Memory, Bit-Passing and Mixed Logic/Memory Operation of two Intercoupled FeFET Arrays

摘要

Recently, memory and logic were brought into closer vicinity by introducing Logic-in-Memory circuits based on ferroelectric FETs (FeFET), where the FeFET not only stores logic values in its ferroelectric layer, but also performs logic operations of externally applied inputs with these internally stored values. As one reason for using these structures is to overcome the von-Neumann bottleneck, their logic readout gained a lot of attention, while the storage of the calculated outputs was neglected. In this paper, we propose to utilize two intercoupled memory arrays for this purpose. Between these, three operation modes are possible: pure memory operation, a passing of bits through the structure (logic mode), and conducting a logic operation in cells of the first memory array, whose result is stored in the cells of the second memory array, directly combining the logic and memory capability of these structures. For the latter, we suggest a suitable operation scheme. Electrical measurements of 28nm HKMG FeFET test structures based on hafnium oxide (HfO2) confirm the feasibility of the proposed logic/memory mixed mode.