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Impact of Ferroelectric Wakeup on Reliability of Laminate based Si-doped Hafnium Oxide (HSO) FeFET Memory Cells

机译:铁电唤醒对叠层硅掺杂氧化Ha(HSO)FeFET存储器单元可靠性的影响

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The impact of the ferroelectric (FE) wakeup phenomenon on the reliability of fluorite structure-based laminated Si-doped hafnium oxide (HSO) FeFET memory cells is reported. The post wakeup cycling shows a strong change in the optimal program/erase (PG/ER) write conditions. A shift towards lower PG/ER switching conditions at a higher memory window (MW) is observed after wakeup cycling. Similarly, the cross wafer statistics for different FeFET dimensions shows a strong wakeup influence towards a lower variability and higher MW after wakeup. For the wakeup cycling different trends for amplitude and pulse width variation are observed. The increase in write pulse amplitude has limited impact whereas the number of wakeup cycles appears to be the driving factor. On the contrary, the write pulse width sweep (50-800ns) shows faster wakeup as the pulse width increases even on pristine devices. The FeFET area sweep shows a comparable wakeup behavior with a trend of higher shift window on larger devices. The high-temperature operation shows an initially lower MW and pronounced wakeup effect. On the other hand, the pyroelectric effect dominates at lower temperatures and leads to initially higher MW with an insignificant wakeup. The various factors associated with the FE wakeup effect are studied with insight into the changes in FeFET stack physics during wakeup cycling.
机译:报道了铁电(FE)唤醒现象对基于萤石结构的叠层硅掺杂氧化ha(HSO)FeFET存储单元可靠性的影响。唤醒后的循环表明,最佳编程/擦除(PG / ER)写入条件发生了很大变化。唤醒循环后,观察到在较高的存储窗口(MW)下向较低的PG / ER切换条件的转变。类似地,不同FeFET尺寸的跨晶圆统计数据显示出强烈的唤醒影响,即唤醒后对较低的可变性和较高的MW产生了影响。对于唤醒循环,观察到幅度和脉冲宽度变化的不同趋势。写脉冲幅度的增加影响有限,而唤醒周期数似乎是驱动因素。相反,即使在原始设备上,随着脉冲宽度的增加,写入脉冲宽度扫描(50-800ns)也显示出更快的唤醒时间。 FeFET区域扫描显示出可比的唤醒行为,并且在较大的器件上具有较高的移位窗口趋势。高温运行显示出最初较低的MW和明显的唤醒效果。另一方面,热电效应在较低的温度下占主导地位,并导致初始的较高MW,而唤醒却微不足道。深入研究了与FE唤醒效应相关的各种因素,以了解FeFET堆栈在唤醒循环过程中的变化。

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