首页> 外文会议>IEEE European Test Symposium >Digital Defect Based Built-in Self-Test for Low Dropout Voltage Regulators
【24h】

Digital Defect Based Built-in Self-Test for Low Dropout Voltage Regulators

机译:基于数字缺陷的内置低压差稳压器自测

获取原文

摘要

With the increasing complexity of electronic components in critical applications, pressure on single components to have zero defects is also increasing. Thus there is a need to explore built-in self-test and other non-traditional test techniques for mixed-signal circuits, such as data converters, phase locked loops and power converters. In this paper, we present an extremely low cost, digital built-in self-test methodology for Low Dropout Regulators (LDO), specifically used for defect detection. The technique relies on perturbing the LDO loop at the reference voltage input via pseudo random binary sequence which has white noise characteristics and cross correlating the output of LDO with input excitation using only digital circuits, thus inducing low power and area overhead. The built-in self-test technique together with an LDO is designed using 65nm TMSC technology. Transistor level structural fault simulations display that all inserted faults can be detected even if they do not change the DC level of the LDO output.
机译:随着电子元件在关键应用中的复杂性越来越复杂,单个组分的压力也在增加。因此,需要探索混合信号电路的内置自检和其他非传统测试技术,例如数据转换器,锁相环和功率转换器。在本文中,我们为低丢弃稳压器(LDO)提供了极低的成本,数字内置自测方法,专门用于缺陷检测。该技术依赖于通过伪随机二进制序列对参考电压输入的LDO环扰动,其具有白噪声特性,并且仅使用数字电路将LDO输出与输入激励相关联,从而诱导低功率和面积开销。使用65nm TMSC技术设计内置自测技术与LDO一起设计。晶体管电平结构故障模拟显示,即使它们不改变LDO输出的DC电平,也可以检测到所有插入的故障。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号