Fermi Level Unpinning of GaSb(100) using Plasma Enhanced ALD Al_2O_3 Dielectric

摘要

Antimonide based compound semiconductors have gained considerable interest in recent years due to their superior electron and hole transport properties [1-3]. Among the various high mobility material systems (Fig. 1), arsenic-antimonide based MOS-HEMTs have great potential to enable complementary logic operation at low supply voltage. Integrating a high quality dielectric is key to demonstrating a scalable arsenic-antimonide MOS-HEMT architecture for 15 nm logic technology node and beyond. It is hypothesized that an ultra-thin GaSb surface layer is more favorable toward high-κ integration than In_(0.2)Al_(0.8)Sb barrier as it avoids Al at the interface and the associated surface oxidation. Here, we study the effects of various surface passivation approaches on the capacitance-voltage characteristics (C-V) and the surface chemistry of n-type and p-type GaSb(100) MOS capacitors made with ALD and Plasma Enhanced ALD (PEALD) Al_2O_3 dielectric. We demonstrate for the first time, unpinned Fermi level in GaSb MOS system with high-κ PEALD Al_2O_3 dielectric using admittance spectroscopy and XPS analysis. N-type and p-type GaSb (100) wafers were degreased in acetone and IPA. For some samples HCl etch was used to remove surface oxide and a dilute ammonium sulfide solution was used to passivate the surface. GaSb MOS capacitors were fabricated with Al_2O_3 deposited by ALD at 300°C from trimethylaluminum (TMA) and water or by PEALD at 200°C from TMA and CO_2. PEALD was employed to reduce the thermal budget of dielectric deposition, particularly important for antimonide semiconductors [4]. Fig. 2 shows the C-V measurements on the n-type ALD Al_2O_3-GaSb MOS capacitors. The control sample without surface preparation showed a pinned Fermi level, and the HCl and ammonium sulfide treated ALD samples showed weakly pinned C-V characteristics with very fast interface trap (D_(it)) response. Fig. 3 shows C-V and G-V (conductance) characteristics of the n-type PEALD samples which shows very good Fermi level modulation. The accumulation side of the admittance data was analyzed using the standard depletion/accumulation model and the inversion side using the model shown in Fig. 4(a) [5]. The circuit model in inversion accounts for the supply of minority carriers along with interface state contribution which enables accurate modeling of the admittance data in weak inversion. The modeled data and extracted quasi-static C-V corrected for D_(it) are also shown in Fig. 3 which is in good agreement with the measured data. Fig. 4(b) shows the Arrhenius plot of the minority carrier (hole) conductance in the n-type PEALD sample which gives an activation energy of 0.1eV. This is much less than the activation energy for SRH generation through mid-level traps in the depletion region (Eg/2=0.36 eV). It could be possible the second ionization level of the native acceptor defects (at 0.1 eV from valence band due to Ga vacancies and antisite defects [6]) is supplying the minority carriers for inversion.