A Voltage-Mode Buck Converter With a Reduced Type-I Compensation Capacitor Using an Error-Amplifier Current-Sampling Scheme

摘要

This paper proposes a voltage-mode buck converter with a reduced type-I compensation capacitor. A large type-I compensation capacitor is used, because it receives an error-amplifier current during a whole PWM cycle time but its voltage changes slowly for a good stability. It is significantly reduced by supplying the error-amplifier current during a short sampling time instead of the whole PWM cycle time. It decreases in proportion to the ratio of the sampling time and the PWM cycle time. The proposed buck converter was fabricated in a 1.8V 65nm CMOS process. The compensation capacitor is reduced from 10nF to 100pF.