Improving Security of Logic Encryption in Presence of Design-for-Testability Infrastructure

摘要

Logic Encryption has emerged to be a promising solution to the ever-increasing problem of IP piracy and counterfeiting. The state-of-the-art logic encryption techniques fail to offer adequate protection to the designs, equipped with Design-for-Testability (DfT) infrastructure. In this paper, we propose a new logic encryption strategy which prevents scan-chain guided circuit partitioning attack by introducing circular dependency among all the keys irrespective of their locations. Leveraging the circular dependency, the proposed method can also thwart path sensitization, logic cone based, and SAT attacks without adopting any complex key-gate placement algorithms.