Investigating the Aging Dynamics of Diode-Connected MOS Devices Using an Array-Based Characterization Vehicle in a 65nm Process

摘要

This work presents measured test-data corresponding to a comprehensive reliability characterization of diode-connected MOS transistors. An array-based test structure, with the specific aim of quantifying the impact of feedback on the aging dynamics for the circuit configuration of interest was designed and implemented in a 65nm Low-Power (LP) process. Through detailed measurement data obtained using the test-vehicle we, (1) characterize the impact of feedback on the aging rate and compare it to the no-feedback case & (2) evaluate the efficacy of iterative simulations for lifetime projection in such scenarios with the method based on the universality of hot carrier degradation extended to the case featuring feedback.