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Near-Memory and In-Storage FPGA Acceleration for Emerging Cognitive Computing Workloads

机译:用于新兴认知计算工作量的近存储器和存储中FPGA加速

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The slow down in Moore's Law has resulted in poor scaling of performance and energy. This slow down in scaling has been accompanied by the explosive growth of cognitive computing applications, creating a demand for high performance and energy efficient solutions. Amidst this climate, FPGA-based accelerators are emerging as a potential platform for deploying accelerators for cognitive computing workloads. However, the slow-down in scaling also limits the scaling of memory and I/O bandwidths. Additionally, a growing fraction of energy is spent on data transfer between off-chip memory and the compute units. Thus, now more than ever, there is a need to leverage near-memory and in-storage computing to maximize the bandwidth available to accelerators, and further improve energy efficiency. In this paper, we make the case for leveraging FPGAs in near-memory and in-storage settings, and present opportunities and challenges in such scenarios. We introduce a conceptual FPGA-based near-data processing architecture, and discuss innovations in architecture, systems, and compilers for accelerating cognitive computing workloads.
机译:摩尔定律的放慢导致性能和能量的伸缩性变差。缩放速度的放缓伴随着认知计算应用的爆炸性增长,从而产生了对高性能和高能效解决方案的需求。在这种环境下,基于FPGA的加速器正在成为为认知计算工作负载部署加速器的潜在平台。但是,缩放速度的降低也限制了内存和I / O带宽的缩放。另外,越来越多的能量被花费在片外存储器和计算单元之间的数据传输上。因此,现在比以往任何时候都需要利用近内存和存储内计算来最大化加速器可用的带宽,并进一步提高能源效率。在本文中,我们为在接近内存和存储环境中利用FPGA的情况作了说明,并提出了在这种情况下的机遇和挑战。我们介绍了一种基于FPGA的概念性近数据处理架构,并讨论了用于加速认知计算工作量的架构,系统和编译器方面的创新。

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