Towards Large-Scale Sparse Matrix-Vector Multiplication on the SW26010 Manycore Architecture

摘要

Sparse matrix-vector multiplication (SpMV) is one of the important subroutines in numerical linear algebra widely used in plenty of large-scale applications. This paper focuses on scaling and optimizing SpMV for large-scale applications based on the memory structure and computing architecture of SW26010 CPU of the Sunway TaihuLight supercomputer. We propose the large-scale SpMV on the Sunway TaihuLight that includes two parts, i.e., the parallel partial (Compressed Sparse Row) CSR-based SpMV part and the parallel accumulation part. We respectively propose the adaptive partitioning methods and parallelization designs for the two parts of the large-scale SpMV based on the SW26010 architecture. The experimental results prove that the large-scale SpMV achieves high efficiency and good scalability on the Sunway TaihuLight.