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Split-Gate FeFET (SG-FeFET) with Dynamic Memory Window Modulation for Non-Volatile Memory and Neuromorphic Applications

机译:具有动态存储器窗口调制功能的裂闸式FeFET(SG-FeFET),适用于非易失性存储器和神经形态应用

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In this work, we propose a novel split-gate FeFET (SG-FeFET) with two separate external gates to dynamically modulate the memory window (MW) for non-volatile memory and neuromorphic applications. During read operation, only one gate is turned on to decrease the area ratio (AFE/AIL) of ferroelectric layer to insulator layer, which increases MW and read current ratio (IRead-1/IRead-0). During write operation (program/erase), both two gates are turned on to increase AFE/AIL, which decreases MW, thereby resulting in lower write voltage (VWrite). Compared to FeFET, SG-FeFET (1) Demonstrates lower VWrite(=1.85V) and 59.5% reduction in write energy at fixed IRead-1/IRead-0;(2) Exhibits lower read energy (-11.3%) and higher IRead-1/IRead-0(=8.6E6) at fixed VWrite;(3) Allows random access and eliminates half-select disturb; (4) Preserves higher endurance due to lower VWrite and charge trapping. SG-FeFET as synaptic device also exhibits superior symmetry and linearity for potentiation and depression process.
机译:在这项工作中,我们提出了一种新颖的分裂栅FeFET(SG-FeFET),它具有两个独立的外部栅,可以动态地调制用于非易失性存储器和神经形态应用的存储器窗口(MW)。在读取操作期间,仅打开一个栅极以减小铁电层与绝缘层的面积比(AFE / AIL),从而增加MW和读取电流比(IRead-1 / IRead-0)。在写操作(编程/擦除)期间,两个栅极均打开以增加AFE / AIL,从而减小MW,从而导致较低的写电压(VWrite)。与FeFET相比,SG-FeFET(1)在固定的IRead-1 / IRead-0下表现出更低的VWrite(= 1.85V)和降低了59.5%的写入能量;(2)展示出更低的读取能量(-11.3%)和更高的IRead固定VWrite时为-1 / IRead-0(= 8.6E6);(3)允许随机访问并消除半选干扰; (4)由于较低的VWrite和电荷陷阱,可保留较高的耐久性。 SG-FeFET作为突触设备,在增强和抑制过程中也显示出优异的对称性和线性。

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