A Systolic Array Algorithm Based on Band-Convolution Structure for an Efficient VLSI Implementation of the Odd-Time Generalized Discrete Hartley Transform

摘要

An efficient design approach for a VLSI implementation of a prime-length odd-time generalized discrete Hartley transform using a new computational structure called band-convolution is presented. It uses an appropriate hardware algorithm based on two band-convolution structures having the same form and length that can be computed in parallel. Using an appropriate hardware sharing technique results in high computing speed with low hardware complexity. It has all the other advantages of the systolic array implementation based on cyclic convolution structures as low I/O cost, regular and modular structures and local connections.