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The Bias and Clock Drive ASIC for Astronomical CCD Controller

机译:用于天文CCD控制器的偏置和时钟驱动ASIC

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The Application-Specific Integrated Circuit (ASIC) development plan of the astronomical CCD control system is a special chip development project launched officially by the National Astronomical Observatory of the Chinese Academy of sciences. One of the scientific objectives: Bias and Clock Driver ASIC (CDA), has been designed and manufactured twice. The test shows the performance of CDA completely reach the design requirement. Now this chip can be mass produced at low cost. We claim the CDA is successfully developed in our laboratory. CDA provides bias voltage and clock drives for CCD working. 48 DACs which produce pulse at any amplitude can be used for most CCD controller. The combination of CDA and ASIC lead to integrated multi-CCD system or sub-mini single CCD controller. This high integrated chip make the CCD controller smaller, lower power consumption, more stable and easier to be developed.
机译:天文CCD控制系统的专用集成电路(ASIC)开发计划是中国科学院国家天文台正式启动的一项特殊芯片开发项目。科学目标之一:偏置和时钟驱动器ASIC(CDA)已设计和制造了两次。测试表明,CDA的性能完全达到了设计要求。现在,该芯片可以低成本大量生产。我们声称CDA已在我们的实验室成功开发。 CDA为CCD工作提供偏置电压和时钟驱动器。大多数CCD控制器都可以使用48个DAC,它们产生任意幅度的脉冲。 CDA和ASIC的组合导致集成的多CCD系统或超小型单CCD控制器。这种高集成度的芯片使CCD控制器更小,功耗更低,更稳定且更易于开发。

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