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Low Power Near-sensor Coarse to Fine XOR based Memristive Edge Detection

机译:低功率近传感器粗到基于精细XOR的忆阻边缘检测

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In this paper, we propose XOR based memristive edge detector circuit that is integrated into a near sensor log-linear CMOS pixel. Memristor threshold logic was used to design NAND gates, which serve as a building block for XOR gates. For validation of proposed circuit functionality hardware simulation of logic gates with a pixel pair was conducted using TSMC 0.18um technology and system-level simulation of the proposed circuit using SPICE models. The proposed method operates in low power and takes a small area on chip. The power consumption of one pixel is 1.16uW and total area 36.72 um2 without photosensing component. The power consumption of NAND circuit is 1.11pW and total area 32.4um2.
机译:在本文中,我们提出了一种基于XOR的忆阻边缘检测器电路,该电路已集成到近传感器对数线性CMOS像素中。忆阻器阈值逻辑用于设计“与非”门,作为“异或”门的基础。为了验证拟议的电路功能,使用TSMC 0.18um技术对具有像素对的逻辑门进行了硬件仿真,并使用SPICE模型对拟议电路进行了系统级仿真。所提出的方法以低功率工作并且占用小芯片面积。一个像素的功耗为1.16uW,总面积为36.72 um 2 没有光敏元件。 NAND电路的功耗为1.11pW,总面积为32.4um 2

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