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Design Considerations of Monolithically Integrated Voltage Regulators for Multicore Processors

机译:用于多核处理器的单片集成稳压器的设计注意事项

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Presented in this paper are design considerations for a Monolithically Integrated Voltage Regulator (MIVR) targeting a 32mm2multicore processor test chip taped-out in TSMC 28nm process. This is the first work discussing the utilization of on-die magnetic core inductors to support >50A of load current. 64 inductors with switching frequency of 140MHz are strategically grouped into eight interleaving phases to achieve 85% efficiency and minimize on-die voltage drop.
机译:本文介绍了针对32mm单片集成稳压器(MIVR)的设计注意事项 2 台积电28nm工艺中推出的多核处理器测试芯片。这是讨论利用片上磁芯电感器来支持> 50A负载电流的第一项工作。从战略上讲,将64个开关频率为140MHz的电感器分为八个交错阶段,以达到85%的效率并最大程度地降低芯片上的压降。

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