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A switching linear regulator based on a fast-self-clocked comparator with very low probability of meta-stability and a parallel analog ripple control module

机译:基于亚稳态可能性极低的快速自时钟比较器和并行模拟纹波控制模块的开关线性稳压器

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Point of load regulators, with fast response to load transients, are becoming critical components in low power systems. Linear regulators are an area-efficient way to implement fast-response regulation as they require only the transistors and capacitors available in any standard CMOS process. This paper presents a switching linear regulator with a comparator that samples the difference between the regulated voltage and the reference (error) at 4GHz. The comparator uses a novel self-clocking scheme to achieve extremely low probability of meta-stability, even at very high clock frequency. In fast transient mode, the regulator achieves zero droop when the load current steps from <; 1mA to 170mA in 100ps. A digital ripple control mechanism, and an analog ripple control module work together to reduce the ripple on the regulated output. The regulator, fabricated in TSMC's 16nm finFET technology, achieves a peak current efficiency of 97.6% when operating at 4GHz.
机译:快速响应负载瞬变的负载点调节器已成为低功耗系统中的关键组件。由于线性稳压器只需要任何标准CMOS工艺中可用的晶体管和电容器,因此是实现快速响应稳压的一种节省区域的方法。本文介绍了一种带有比较器的开关线性稳压器,该比较器可在4GHz采样电压和参考电压(误差)之间的差异。比较器使用一种新颖的自计时方案,即使在非常高的时钟频率下,也能实现极低的亚稳定概率。在快速瞬态模式下,当负载电流从<变慢时,调节器达到零下降。 1mA至170mA(100ps)。数字纹波控制机制和模拟纹波控制模块一起工作,以减少稳压输出上的纹波。该稳压器采用台积电(TSMC)的16nm finFET技术制造,在4GHz频率下工作时,峰值电流效率达到97.6%。

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