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A Dual-Core 60 GHz Push-Push VCO with Second Harmonic Extraction by Mode Separation

机译:通过模式分离实现二次谐波提取的双核60 GHz推挽VCO

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In this work we present a 60 GHz dual-core push-push Colpitts VCO in 0.13 μm SiGe BiCMOS technology. We propose a circuit technique to extend a Colpitts VCO to a dual-core operation. Additionally, we propose a novel circuit technique that enables extraction of the second-harmonic from a VCO core for push-push operation by means of mode-separation. The principle takes advantage of the fact that the second harmonic is present in a differential VCO in a common-mode. Hence, the fundamental signal can be coupled out from a VCO in differential mode, whereas the second harmonic signal can be coupled via the common-mode. This enables extraction of signals, without loading the VCO core directly by input capacitance of the following buffer stages, which might deteriorate the phase noise. The VCO achieves in measurement a low phase noise of -107 dBc/Hz at 1 MHz offset at 62 GHz and an output power of -1.9 dBm. The VCO including buffer, biasing and frequency divider dissipates in dual-core operation 112 mA, whilst a single VCO core consumes only 24 mA from a single 1.8 V supply. The chip consumes area of 0.95 mm2including pads, buffer and frequency divider chain.
机译:在这项工作中,我们展示了采用0.13μmSiGe BiCMOS技术的60 GHz双核推挽式Colpitts VCO。我们提出一种电路技术,将Colpitts VCO扩展到双核操作。此外,我们提出了一种新颖的电路技术,该技术能够通过模式分离从VCO内核中提取二次谐波以进行推压操作。该原理利用了这样的事实,即第二谐波在共模下存在于差分VCO中。因此,基本信号可以在差分模式下从VCO耦合输出,而二次谐波信号可以通过共模耦合。这样就可以提取信号,而无需通过后面的缓冲级的输入电容直接加载VCO内核,这可能会使相位噪声恶化。 VCO在测量中在62 GHz处在1 MHz偏移处实现了-107 dBc / Hz的低相位噪声和-1.9 dBm的输出功率。在双核操作中,包括缓冲器,偏置和分频器在内的VCO耗散112 mA,而单个VCO内核从单个1.8 V电源消耗的电流仅为24 mA。芯片消耗面积0.95毫米 2 包括打击垫,缓冲器和分频器链。

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