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A Power Efficient Ka-Band MMIC Active Frequency Doubler with Output Amplifier

机译:具有输出放大器的高效率Ka波段MMIC有源倍频器

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Design and realization of a two stage, 17.5 GHz to 35.0 GHz active frequency doubler with output amplifier using two GaAs based pHEMTs has been presented in this paper in MMIC form. Fabricated MMIC chip has achieved 10 dB of conversion gain at 35 GHz for 0 to 5 dBm of input power at 17.5 GHz. Saturated output power obtained is 15 dBm. Fractional bandwidth of more than 14% has been observed for 2 dB variation in output power. Total dc power consumption of the chip is 110 mW. Fundamental and spurious rejection is in excess of 45 dBc. Phase noise degradation through the circuit is close to 6 dB, which is the minimum theoretical value. The designed power efficient frequency doubler is highly stable, and capable of producing high quality output spectrum with sufficient power.
机译:本文以MMIC形式介绍了使用两个基于GaAs的pHEMT的带有输出放大器的两级17.5 GHz至35.0 GHz有源倍频器的设计和实现。预制的MMIC芯片在17.5 GHz的输入功率为0至5 dBm时,在35 GHz时已实现10 dB的转换增益。获得的饱和输出功率为15 dBm。对于2 dB的输出功率变化,观察到的分数带宽超过14%。芯片的总直流功耗为110 mW。基本和杂散抑制超过45 dBc。通过电路的相位噪声衰减接近6 dB,这是最小理论值。设计的省电倍频器具有很高的稳定性,并能够以足够的功率产生高质量的输出频谱。

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