TCAD based Design-Technology Co-Optimisations in advanced technology nodes

摘要

In this paper we present and illustrate the concepts of TCAD based Design-Technology Co-Optimisation (DTCO) including both process-induced (global) and intrinsic (local) statistical variability. A generic 14nm FinFET CMOS technology is used to motivate and illustrate this study. Predictive Ensemble Monte Carlo (EMC) TCAD simulations have been carried out to evaluate the transistor performance. Drift diffusion (DD) simulations calibrated to the Ensemble Monte Carlo (EMC) simulation results are used to explore the process and the statistical variability space. The seamless execution of the DTCO flow has been enabled by the automation of the tool flow and the dataset handling. The interplay between the process and the statistical variability has been captured in details. A two-stage hierarchical compact model strategy is used to capture the interplay between process and statistical variability. Advances statistical compact model generation is used to study the impact of the variability on the circuit performance and yield at high sigma.