Busbar design for SiC-based H-bridge PEBB using 1.7 kV, 400 a SiC MOSFETs operating at 100 kHz

摘要

This paper presents a systematic study of the busbar design and optimization for SiC-based H-bridge power electronics building block (PEBB) used in high-frequency and high-power applications. Step-by-step guidelines are presented in which the design considerations and analysis are given. This paper presents a double-sided busbar concept to create a compact PEBB design with improved thermal and switching performance, which result from having double-side cooling and symmetric minimized current commutation loop inductances, respectively. The proposed concept is verified experimentally by evaluating the high-speed switching performance of the PEBB up to 400 A.