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Interactions between gliding dislocations in 3C-SiC(001)

机译:3C-SiC(001)中滑脱位错之间的相互作用

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3C-SiC has been identified as a leading semiconducting material for use in high voltage, high temperature, and high frequency devices. However, stacking faults form as a result of the 19.7% lattice mismatch at the 3CSiC/Si interface, and then propagate during epitaxial growth along four equivalent planes. After epitaxial growth has concluded, the presence of the stacking faults causes an intrinsic stress in the system that allows for the carbon-core partial dislocations to deviate in specific directions from their current plane, thus producing crowd lines of point defects as a result of forest dislocation formations, which are believed to be the main cause of high leakage current density in 3C-SiC. Monte Carlo simulations are employed to model the formation, propagation, and expansion of stacking faults, as well as the generation of the forest dislocations. The numerical analysis allows for a clear picture of the density of the forest dislocations throughout the system as a function of the stacking fault density and material thickness. In addition, the study predicts the orientations along which the forest dislocations will most likely form. Further analysis of the mechanisms by which forest dislocations form and the leakage current occurs will lead to more sophisticated fabrication processes of 3C-SiC.
机译:3C-SiC被认为是用于高压,高温和高频设备的领先半导体材料。但是,堆叠缺陷是由于3CSiC / Si界面处19.7%的晶格失配而形成的,然后在外延生长期间沿着四个等效平面传播。外延生长结束后,堆垛层错的存在会在系统中产生内在应力,从而使碳核部分位错在特定方向上偏离其当前平面,从而由于森林而产生点缺陷的拥挤线位错形成,据认为是3C-SiC中高漏电流密度的主要原因。蒙特卡洛模拟被用来模拟堆垛层错的形成,传播和扩展,以及森林错位的产生。数值分析可以清楚地了解整个系统中森林错位的密度与堆垛层错密度和材料厚度的关系。此外,研究预测了森林错位最有可能形成的方向。对森林错位形成和漏电流发生的机理的进一步分析将导致3C-SiC的制造工艺更加复杂。

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