Signal Integrity Analysis for High-speed Memory Test Interface using Data Capture PCB

摘要

In this paper, in high-speed graphic memory test interface, the trade-off relationship for electrical characteristic of the branch signal due to the branch structure and its degradation characteristics are analyzed in terms of signal integrity. A capture PCB is required in order to capture bit patterns for further failure analysis when GPU transmits signals to the high-speed graphic memory. The PCB is placed between prototype mother board and the memory. In the capture PCB, since signals are split into two, signal integrity is more degraded than before. Thus, this paper focuses on the reflection-analysis at the junction and discusses the trade-off among characteristics of received signal at the memory and captured signal depending on capture PCB design.