首页> 外文会议>IEEE International Electron Devices Meeting >A ReRAM-based single-NVM nonvolatile flip-flop with reduced stress-time and write-power against wide distribution in write-time by using self-write-termination scheme for nonvolatile processors in IoT era
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A ReRAM-based single-NVM nonvolatile flip-flop with reduced stress-time and write-power against wide distribution in write-time by using self-write-termination scheme for nonvolatile processors in IoT era

机译:基于ReRAM的单NVM非易失性触发器,通过针对物联网时代的非易失性处理器使用自写终止方案,减少了应力时间和写功率,从而避免了写时的广泛分布

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Recent nonvolatile flip-flops (nvFFs) enable the parallel movement of data locally between flip-flops (FFs) and nonvolatile memory (NVM) devices for faster system power off/on operations. The wide distribution and long period in NVM-write times of previous two-NVM-based nvFFs result in excessive store energy (Es) and over-write induced reliability degradation for NVM-write operations. This work proposes an nvFF using a single NVM (1R) with self-write-termination (SWT), capable of reducing ES by 27+x and avoid over-write operations. In fabricated 65nm ReRAM nvProcessor testchips, the proposed SWT1R nvFFs achieved off/on operations with a 99% reduction in Es and 2.7ns SWT latency (TSWT). For the first time, an nvFF with single NVM device is presented.
机译:最近的非易失性触发器(nvFF)使数据能够在触发器(FF)和非易失性存储器(NVM)设备之间本地并行移动,以实现更快的系统电源关闭/打开操作。以前的两个基于NVM的nvFF的NVM写入时间分布广泛且周期长,这会导致过多的存储能量(Es)并导致NVM写入操作的可靠性被覆盖而导致可靠性下降。这项工作提出了使用具有自写终止(SWT)的单个NVM(1R)的nvFF,该功能能够将ES降低27 + x,并避免覆盖操作。在制造的65nm ReRAM nvProcessor测试芯片中,建议的SWT1R nvFF实现了关闭/打开操作,ES降低了99%,SWT延迟(TSWT)降低了2.7ns。首次展示了具有单个NVM设备的nvFF。

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