New hybrid multilevel inverter topology with reduced switch count using carrier based pulse width modulation technique

摘要

Research of multilevel inverter (MLI) has always been a noteworthy inspiration to increasing number of levels with decreasing total harmonic distortion (THD). Various topologies of symmetric dc source and asymmetric dc source multilevel inverter have been developed. In this paper, a new asymmetric dc source hybrid multilevel inverter topology with minimized switch count is proposed. It is possible to extent any number of levels. Multicarrier pulse width modulation techniques are adopted for triggering the gate pulses. The operation of the proposed topology is explained with 15-level output voltage. In that, phase disposition (PD) technique has 8.03% of THD when compared to the carrier overlapping (CO) technique. The simulation results are carried out by using MATLAB/Simulink with different modulation index.