首页> 外文会议>International Conference on Advanced Technologies for Communications >Dual-switch power gating technique with small energy loss, low area, short crossover time, and fast wake-up time for fine-grain leakage controlled VLSIs
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Dual-switch power gating technique with small energy loss, low area, short crossover time, and fast wake-up time for fine-grain leakage controlled VLSIs

机译:双开关功率门控技术,能量损失小,面积小,交叉时间短,唤醒时间短,适用于细颗粒泄漏控制的VLSI

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In this paper, we compared various power gating schemes in terms of energy loss, crossover time, and wake-up time using the 45-nm Predictive Technology Model. In this comparison, the Dual-Switch Power Gating (DSPG) shows smaller energy loss, shorter crossover time, faster wake-up time than the other power gating schemes such as the Single-Switch and Charge-Recycled Power Gating schemes. Based on these advantages, the DSPG is suggested in this paper as a viable candidate suitable to a fine-grain leakage control scheme, where logic blocks go in and out very frequently and shortly between the active and sleep modes.
机译:在本文中,我们使用45纳米预测技术模型在能量损耗,穿越时间和唤醒时间方面比较了各种功率门控方案。在此比较中,双开关电源门控(DSPG)与其他电源门控方案(如单开关和电荷回收电源门控方案)相比,具有更低的能量损耗,更短的穿越时间,更快的唤醒时间。基于这些优点,本文建议使用DSPG作为适用于细颗粒泄漏控制方案的可行候选方案,在该方案中,逻辑块非常频繁地进入和退出活动模式和睡眠模式之间。

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