首页> 外文会议>International Conference on Advanced Technologies for Communications >Dual-switch power gating technique with small energy loss, low area, short crossover time, and fast wake-up time for fine-grain leakage controlled VLSIs
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Dual-switch power gating technique with small energy loss, low area, short crossover time, and fast wake-up time for fine-grain leakage controlled VLSIs

机译:具有小的能量损失,低区域,交叉时间短的双开关功率门控技术,以及用于细粒泄漏控制VLSIS的快速唤醒时间

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In this paper, we compared various power gating schemes in terms of energy loss, crossover time, and wake-up time using the 45-nm Predictive Technology Model. In this comparison, the Dual-Switch Power Gating (DSPG) shows smaller energy loss, shorter crossover time, faster wake-up time than the other power gating schemes such as the Single-Switch and Charge-Recycled Power Gating schemes. Based on these advantages, the DSPG is suggested in this paper as a viable candidate suitable to a fine-grain leakage control scheme, where logic blocks go in and out very frequently and shortly between the active and sleep modes.
机译:在本文中,我们在使用45nm预测技术模型方面比较了各种功率门控计划和唤醒时间。在这种比较中,双开关功率门控(DSPG)显示了较小的能量损失,较短的交叉时间,比其他功率门控等方案更快的唤醒时间,例如单开关和充电再循环的功率门控方案。基于这些优点,在​​本文中提出了DSPG作为适合于精细滤漏控制方案的可行候选者,其中逻辑块在主动和睡眠模式之间非常频繁,不久地进出。

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