ENERGY-CONSTRAINED V_(DD) HOPPING SCHEME WITH RUN-TIME POWER ESTIMATION FOR LOW-POWER REAL-TIME VLSI SYSTEMS

摘要

In this paper, we propose a novel dynamic voltage scaling algorithm on a variable-voltage processor. It determines the supply voltage on timeslot-by-timeslot basis within the task boundary, and significantly reduces the power consumption by fully exploiting the slack time. Also, we modify this algorithm and propose an energy-constrained dynamic voltage scaling algorithm for low-power multimedia applications. In the multimedia applications, there are usually several alternative algorithms with different performance and power. Considering the trade-off between performance and power, the proposed algorithm adap-tively determines the optimal alternative to achieve optimal performance under given energy constraint. Compared with the conventional algorithms, the power consumption is reduced to 1/14.4 ～ 1/5.6 without performance degradation.