CMOS digital integrated circuits; analogue-digital conversion; integrated circuit design; low-power electronics; LP digital CMOS; figure of merit; flash ADC; full sampling rate; low-power digital CMOS; power 406 mW; power consumption; single-core flash ADC; size 28 nm; ultra-high-speed ADC systems; word length 3 bit; Ash; Bandwidth; CMOS integrated circuits; CMOS technology; Clocks; Silicon germanium; Transmission line measurements; Analog-to-digital converter (ADC); flash ADC; non-time-interleaved; single-core;
机译:采用28nm低功耗数字CMOS的3位24-GS / s闪存ADC的设计与表征
机译:采用0.13μm数字CMOS的6位1.2-GS / s低功耗Flash-ADC
机译:采用28nm CMOS的23mW 24-GS / s 6位电压时间混合时间交错ADC
机译:24 GS / S单核闪存ADC,具有3位分辨率,在28 nm低功耗数字CMOS中
机译:采用65nm CMOS技术的基于时间的低功耗,低失调5位1 Gs / S闪存ADC设计
机译:用于CMOS图像传感器的12位高速列并行两步单斜率模数转换器(ADC)
机译:使用比较器冗余实现90nm CMOS低功耗的6位2.5GS / s闪存ADC