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MFNW: A Flip-N-Write architecture for multi-level cell non-volatile memories

机译:MFNW:一种用于多级单元非易失性存储器的Flip-N-Write体系结构

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The increased capacity of multi-level cells (MLC) in emerging nonvolatile memory (NVM) technologies comes at the cost of higher cell write energies and lower cell endurance. In this paper, we describe MFNW, a Flip-N-Write encoding solution that effectively reduces the average write energy and improves endurance of MLC NVMs. Two MFNW modes are proposed and analyzed: cell Hamming distance (CHD) mode and energy Hamming distance (EHD) mode. For both modes, we derive a probabilistic model to approximate the statistical behavior of MFNW. For negligible error, the probabilistic model predicts the average number of cell writes per memory word, which is proportional to energy consumption. This enables word length optimization to maximize energy reduction subject to memory overhead constraints. We also estimate the hardware and delay overheads to integrate MFNW into a phase change memory prototype. MFNW is compared to two state-of-the-art techniques in the literature using traces of SPEC2006 benchmarks. Simulation results show an average energy reduction of 19% over the state-of-the-art techniques. Furthermore, we investigate the sensitivity of MFNW to the choice of word length, and our findings suggest a tradeoff between word length and energy reduction.
机译:新兴的非易失性存储器(NVM)技术中多层单元(MLC)容量的增加是以较高的单元写入能量和较低的单元耐久性为代价的。在本文中,我们描述了MFNW,这是一种N-Write编码解决方案,可有效降低平均写入能量并提高MLC NVM的耐用性。提出并分析了两种MFNW模式:小区汉明距离(CHD)模式和能量汉明距离(EHD)模式。对于这两种模式,我们导出一个概率模型来近似MFNW的统计行为。对于可忽略的错误,概率模型预测每个存储字的平均单元写入次数,该平均次数与能耗成正比。这使得字长最优化可以最大程度地减少能耗,但要遵守存储开销约束。我们还估计了将MFNW集成到相变存储器原型中的硬件和延迟开销。使用SPEC2006基准的痕迹,将MFNW与文献中的两种最新技术进行了比较。仿真结果表明,与最新技术相比,平均能耗降低了19%。此外,我们研究了MFNW对选择字长的敏感性,我们的发现表明,在字长和节能之间进行了权衡。

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