MIL-STD-1553+: Integrated remote terminal and bus controller at 100-Mb/s data rate

摘要

This work proposes an integrated remote terminal and bus controller: MIL-STD-1553+, implemented in 1.2 V 65-nm CMOS technology occupying 115470 μm of area. It incorporates a synchronous back-end and host processor interface to a true dual port memory for faster memory accesses. Employing a majority-based sampling free-running decoder at its front-end and scaled-up protocol state machines in its control unit, this redesigned controller achieves 100-Mb/s with BER of 10 over 1553 buses, consuming a total power of 29.86 mW.