Circuit mismatch and current coupling effect influence on paralleling SiC MOSFETs in multichip power modules

摘要

This paper reveals that there are circuit mismatches and a current coupling effect in the direct bonded copper (DBC) layout of a silicon carbide (SiC) MOSFET multichip power module. According to the modelling and the mathematic analysis of the DBC layout, the mismatch of the common source stray inductance in the DBC layout can lead to transient current imbalance among the paralleled SiC MOSFET dies in the multichip power module while the current coupling effect aggravates the current imbalance. Two models of the power module DBC layout, with and without the current coupling effect, are compared to demonstrate the influence of this effect. LTspice simulation and experimental results validate the analysis and the new findings.