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24.3 20k-spin Ising chip for combinational optimization problem with CMOS annealing

机译:24.3 20k自旋Ising芯片,用于CMOS退火的组合优化问题

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In the near future, the performance growth of Neumann-architecture computers will slow down due to the end of semiconductor scaling. Presently a new computing paradigm, so-called natural computing, which maps problems to physical models and solves the problem by its own convergence property, is expected. The analog computer using superconductivity from D-Wave [1] is one of those computers. A neuron chip [2] is also one of them. We proposed a CMOS-type Ising computer [3]. The Ising computer maps problems to an Ising model, a model to express the behavior of magnetic spins (the upper left diagram in Fig. 24.3.1), and solves the problems by ground-state search operations. The energy of the system is expressed by the formula in the diagram. Computing flows are expressed in the lower flow chart in Fig. 24.3.1. In the conventional Neumann architecture, the problem is sequentially and repeatedly calculated, and therefore, the number of computing steps drastically increases as the problem size grows. In the Ising computer, in the first step, the problem is mapped to the Ising model. In the next steps, an annealing operation, the ground-state search by interactions between spins, are activated and the state transitions to the ground state where the energy of the system is minimized. The interacting operation between spins is decided by the interaction coefficients, which are set to each connection. Here, the configuration of the interaction coefficients is decided by the problem, and therefore, the interaction coefficients are equivalent to the programming in the conventional computing paradigm. The ground state corresponds to the solution of the original problem, and the solution is acquired by observing the ground state. The interactions for the annealing are performed in parallel, and the necessary steps for the annealing are smaller than that used by a sequential computing, Neumann architecture. As the table in Fig. 24.3.1, our Ising computer uses CMOS circuits to expre- s the Ising model, and acquires the scalability and operation at room temperature.
机译:在不久的将来,由于半导体缩放的结束,Neumann体系结构计算机的性能增长将放慢。当前,期望一种新的计算范例,即自然计算,其将问题映射到物理模型并通过其自身的收敛特性来解决该问题。使用D-Wave [1]中的超导性的模拟计算机就是其中之一。神经元芯片[2]也是其中之一。我们提出了一种CMOS型Ising计算机[3]。 Ising计算机将问题映射到一个Ising模型中,该模型用于表达磁自旋的行为(图24.3.1的左上图),并通过基态搜索操作解决了这些问题。系统的能量由图中的公式表示。计算流程在图24.3.1的下部流程图中表示。在常规的诺伊曼体系结构中,问题是顺序和重复地计算的,因此,随着问题规模的增大,计算步骤的数量急剧增加。在Ising计算机中,第一步是将问题映射到Ising模型。在接下来的步骤中,激活退火操作(通过自旋之间的相互作用进行基态搜索),并且状态转换为使系统能量最小化的基态。自旋之间的交互操作由设置到每个连接的交互系数决定。这里,相互作用系数的配置由问题决定,因此,相互作用系数与常规计算范例中的编程等效。基态对应于原始问题的解,并且通过观察基态来获得解。退火的交互作用是并行执行的,并且退火所需的步骤比顺序计算的Neumann架构所用的步骤要小。如图24.3.1中的表所示,我们的Ising计算机使用CMOS电路来表示Ising模型,并获得在室温下的可扩展性和操作。

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