首页> 外文会议>IEEE International Conference on Electron Devices and Solid-State Circuits >A sub-1-V ultra-low power full CMOS bandgap reference woking in subthreshold region
【24h】

A sub-1-V ultra-low power full CMOS bandgap reference woking in subthreshold region

机译:亚阈值区域内的低于1V的超低功耗全CMOS带隙基准电压源

获取原文

摘要

A sub-1-V nanopower full CMOS bandgap voltage reference is implemented in standard 0.18-μm CMOS process in this paper. The active area occupies only 0.0094mm. Moreover, low voltage and low power operation is achieved by utilizing weighted difference of two gate-source voltages (ΔV) created by a n-MOSFET pair with different gate oxide thickness, three current branches topology and self-cascode structure. Measured results of 20 samples show that it works properly for the supply voltage (V) from 0.8V to 2.5V. The output reference voltage (V) is 564±30mV with standard deviation(σ) being 11.2mV and measured Temperature Coefficient (TC) at best is 8ppm/°C with 15 ppm/°C on average. When supplied by 1V, the power dissipation of proposed bandgap reference is 52nW at 27°C.
机译:本文以标准0.18-μmCMOS工艺实施了Sub-1-V纳米μPower全CMOS带隙电压参考。活性面积仅占0.0094毫米。此外,通过利用由N-MOSFET对具有不同栅极氧化物厚度的N-MOSFET对产生的两个栅极源极电压(ΔV)的加权差来实现低电压和低功率操作。测量结果为20个样品,表明它适用于电源电压(V)0.8V至2.5V的工作。输出参考电压(V)为564±30mV,标准偏差(σ)为11.2mV,最佳测量温度系数(Tc),平均为8ppm /°C,平均为15ppm /°C。当提供1V时,所提出的带隙参考的功耗为52NW,在27°C中。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号