CMOS integrated circuits; MOSFET; arsenic alloys; gallium alloys; indium alloys; semiconductor doping; CMOS-compatible process flow; Insub0.53/subGasub0.47/subAs; RIE; RSD epitaxy; SDE implantation; ballistic limit; barrier doping; channel doping; channel length; complementary metal oxide semiconductor; high-performance self-aligned MOSFET; in-situ-doped raised source/drain epitaxy; inversion oxide thickness; metal oxide semiconductor field effect transistor; series resistance; source/drain extension implantation; transconductance; voltage 0.5 V; Doping; Logic gates; MOSFET; Resistance; Very large scale integration;
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