A 49-dB DR wide locking range hybrid AGC for an ISM-band receiver in 0.18 um CMOS

摘要

A wide locking range hybrid automatic gain control (AGC) loop for an ISM-band receiver is presented. It is composed of a three-stage Programmable Gain Amplifier (PGA), a differential-output Received Signal Strength Indicator (RSSI), a SAR ADC and control algorithm logic. The indicator's transfer function is realized in three segments, each of them covering 20dBm input range, in order to achieve higher sensitivity. The PGA gain can be configured either automatically by the AGC loop, or manually through the SPI interface. Implemented in 0.18um CMOS, measurement results show that the PGA dynamic range covers from 0.2 to 49.3dB, with 0.98 dB gain steps on average. The RSSI achieves maximum 70mV/dBm input sensitivity and 0.3–1.4V output range with a simulated maximum settling time of 8us. The proposed AGC consumes 3.2 mA current from a 1.7V supply.