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CMOS-NEM relay based on tungsten VIA layer

机译:基于钨VIA层的CMOS-NEM继电器

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A CMOS-NEM tungsten relay based on a 3-T configuration for logic applications is presented. The relay is integrated monolithically in the BEOL of a standard CMOS technology (AMS 0.35 µm) using the tungsten VIA3 layer. The relay is designed and fabricated during the CMOS process and released by a one-step mask-less wet etching. The measured devices show an essentially zero leakage current and a subthreshold slope less than 5 mV/decade with a 10 ratio between on-off current, although they exhibit a high contact resistance (∼ 10 Ω). A cycling test was carried out up to 1800 cycles in ambient conditions. Throughout this test, the switch shows great endurance. Finally, the frequency response was also measured.
机译:提出了一种基于3-T配置的CMOS-NEM钨继电器,用于逻辑应用。该继电器使用钨VIA3层单片集成在标准CMOS技术(AMS 0.35 µm)的BEOL中。该继电器是在CMOS工艺过程中设计和制造的,并通过一步式无掩模湿法刻蚀释放。被测器件显示出基本为零的泄漏电流,亚阈值斜率小于5 mV /十倍,通断电流之比为10,尽管它们具有较高的接触电阻(〜10Ω)。在环境条件下进行了多达1800个循环的循环测试。在整个测试过程中,开关表现出了出色的耐用性。最后,还测量了频率响应。

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