Avoiding Si MOSFET avalanche and Achieving Zero-Voltage-Switching for Cascode Devices

摘要

The cascode structure is widely used for high voltagenormally on wide band gap devices. However the interactionbetween the high voltage normally on device and low voltagenormally off Si MOSFET may induce undesired features. Thispaper analyzes the voltage distribution principle during turn offtransition as well as zero-voltage-switching (ZVS) principleduring turn on transition for cascode devices. The capacitancemismatch between high voltage normally on device and lowvoltage Si MOSFET causes Si MOSFET avalanche and highvoltage device internal lose ZVS condition. This issue must besolved both for power loss and reliability consideration. A simpleeffective solution is proposed by adding an extra capacitor tocompensate the capacitance mismatch and avoid Si MOSFETavalanche and achieve true ZVS for cascode devices. The benefitsand small penalty are analyzed in detail. The theoretical analysisis validated by experiments which is implemented based on 600Vcascode GaN device. The experiment shows that the proposedmethod improves the 600V cascode GaN devices performancesignificantly in high frequency application.