A hybrid SAR-VCO ΔΣ ADC with first-order noise shaping

摘要

A scaling-friendly, hybrid, two-stage ΔΣ ADC with a 5-bit SAR as first stage and a VCO as second stage is presented in this work. Since the VCO can provide fine quantization for small signals in the time-domain, it is used to directly quantize the SAR residue without OTA-based residue amplification. Also, having a small input swing obviates the need for VCO non-linearity calibration. The VCO phase overflow problem is solved by using a counter to record the number of overflows, thus allowing a variable sampling rate. Since the VCO phase and counter are never reset, the VCO's first-order noise-shaping capability is retained. A prototype ADC in an 180 nm process achieves 73 dB SNDR over 2.2 MHz bandwidth and consumes 5 mW from a 1.8V supply while sampling at 35 MHz.