Challenges for analog nanoscale technology

机译：模拟纳米技术的挑战

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摘要

The five papers in this session address various facets of technology scaling for SoCs as determined by the need to achieve power, performance and cost targets, along with meeting ever-increasing functionality requirements without compromising reliability.

机译：本节会议上的五篇论文讨论了SoC技术扩展的各个方面，这些方面取决于实现功率，性能和成本目标的需要，以及在不损害可靠性的前提下满足不断增长的功能要求。

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《IEEE Custom Integrated Circuits Conference》|2014年|1-1|共1页
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Venkatraman Ramnath; Guo Richard;
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Accuracy; Computational efficiency; Layout; Nanoscale devices; Semiconductor device reliability; System-on-chip;

机译：精度;计算效率;布局;纳米器件;半导体器件可靠性;片上系统;

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Challenges for analog nanoscale technology

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