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Dynamic off-state TDDB of ultra short channel HKMG nFETS and its implications on CMOS logic reliability

机译:超短通道HKMG nFET的动态断态TDDB及其对CMOS逻辑可靠性的影响

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The impact of DC off-state and AC gate + off-state stress on the time dependent dielectric breakdown (TDDB) of ultra-short channel high-k/metal gate (HKMG) nMOSFETs was investigated. Under high DC off-state (drain) bias, the dielectric wear out was found to be caused by hot hole injection at the drain side. The breakdown time scaled with the gate length in accordance with a higher impact ionization rate by an increased subthreshold leakage current for shorter channels. At identical bias, drain-only stress results in a less severe degradation in comparison to gate-only stress. However, the combination of alternating gate and off-state stress results in a lower lifetime compared to DC and AC gate-only stress. The AC gate + off-state pattern exhibits a similar degradation behavior as bipolar AC stress, attributed to continuous charge trapping and detrapping in the gate oxide. The TDDB failure distribution did not obey the Poisson area scaling assuming randomly generated defects. The spatial asymmetric breakdown localized at the drain edge could be described applying a more general negative binominal yield model.
机译:研究了直流截止状态和交流栅极+截止状态应力对超短沟道高k /金属栅极(HKMG)nMOSFET随时间变化的介电击穿(TDDB)的影响。在高的直流截止状态(漏极)偏压下,发现电介质损耗是由漏极侧的热空穴注入引起的。对于较短的通道,击穿时间根据栅极的长度与较高的碰撞电离率相对应,并通过增加的亚阈值泄漏电流来确定。在相同的偏压下,与仅栅极应力相比,仅漏极应力导致的退化程度较小。但是,与仅使用直流和交流栅极应力相比,交替施加栅极和截止状态应力会导致使用寿命降低。 AC栅+断态图形表现出与双极性AC应力相似的退化行为,这归因于栅氧化物中的连续电荷俘获和去俘获。假设随机产生的缺陷,TDDB失效分布不服从泊松面积缩放。可以使用更一般的负二项式产量模型描述位于排水边缘的空间不对称击穿。

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