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FPGA-Based Multi-core Reconfigurable System for SAR Imaging

机译:基于FPGA的SAR成像的基于FPGA的多核可重新配置系统

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With the development of the very large scale integration circuit (VLSI), multi-core processors have been developing fast and provide a novel approach to meet the requirements of modern complex computing. Real-time SAR imaging is always a hard problem to deal with since the huge amount of data and complex processing. Therefore, we design a schedulable and scalable multi-core parallel architecture based on FPGA and map the fundamental Chirp Scaling algorithm to the system. The design of the master control core makes the system highly extensible and the dedicated computing cores are designed to accelerate the process. In addition, the system can meet the real-time requirements, and it performs well in the resource utilization and the FPGA chip takes up a small space as well.
机译:随着大规模集成电路(VLSI)的发展,多核处理器一直在开发快速,提供一种新的方法来满足现代复杂计算的要求。实时SAR成像始终是处理巨额数据和复杂处理以来的难题。因此,我们设计基于FPGA的可调度和可扩展的多核并行架构,并将基本啁啾缩放算法映射到系统。主控制核心的设计使系统高度可扩展,专用的计算核心旨在加速该过程。此外,系统可以满足实时要求,并且在资源利用率下表现良好,并且FPGA芯片也占用了一个小空间。

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