Workload-aware Failure Prediction Method for VLSI Devices Using an LUT based Approach

摘要

As technology scales, negative bias temperature instability (NBTI) has become one of the primary failure mechanisms for VLSI circuits. The NBTI effect will degrade the speed of the chip and result in timing faults. The supply voltage assignment technique (SVA) can alleviate the NBTI effect but cause extra power dissipation and accelerate the degradation process. Therefore, the supply voltage should be tuned adaptively according to the actual aging condition. However, since the NBTI induced performance aging is strongly dependent on the system workload, it is challenging to accurately predict the timing failure online and provide a reasonable control policy for SVA. To solve this problem, we present a lookup table (LUT)-based failure prediction method that considers the random change in the system workload in the aging estimation. The proposed method obtains the maximum post-aging LUT for different periods of the circuit lifetime under various combination of workloads and supply voltages using logic simulation. Then, curve fitting of these LUT values is applied to estimate the aging rate in practical application. Experimental results on various benchmark circuits demonstrate that the proposed failure prediction method can keep track of a system's workload change online and accurately estimate the aging, which enable SVA to conserve more power dissipation while guaranteeing circuit performance.