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Industry session II: Growing trend of high power FPGA and challenges to package design

机译:工业会议二:高功率FPGA的趋势和包装设计的挑战

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As FPGA strengthening its role from high performance computing, wireline/wireless to accelerator in data center, the needs for high frequency and logic element drives up current and powers consumption rapidly. A few years back, sub-100W would represent most top line applications. Today, FPGA devices of hundreds of amperes and watts are at high demand, especially the stacked silicon line product. Package engineers encounter new challenges to meet electro-migration requirement for specified life time at high junction temperature. This presentation will share how Xilinx develops high power FPGA package to maximize current-carrying capability. The in-depth review includes various design factors and its trade-off between current distribution, temperatures, EM, life time, power integrity, as well as methodology to predict performances.
机译:由于FPGA加强其在高性能计算中的作用,有线/无线到数据中心的加速器,高频和逻辑元件的需求将迅速推动电流和功率的消耗。几年后,Sub-100W将代表大多数顶线应用程序。如今,数百家安培和瓦特的FPGA器件处于高需求,尤其是堆叠的硅线条产品。包装工程师遇到新的挑战,以满足在高结温下指定寿命的电迁移要求。此演示文稿将共享Xilinx如何开发出高功率FPGA包以最大限度地提高电流承载能力。深入审查包括各种设计因素及其在当前分布,温度,EM,寿命,电力完整性以及预测性能的方法之间的权衡。

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