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Half-precision Floating Point on Spiking Neural Networks Simulations in FPGA

机译:FPGA中尖峰神经网络模拟的半精度浮点

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The use of half-precision floating-point numbers (hFP) in simulations of spiking neural networks (SNN) was investigated. The hFP format is used successfully in computer graphics and video games for storage and data transfer. The IEEE 754-2008 standard settles that arithmetic operations must occur at least on single-precision floating-point format (sFP). This means that it is necessary to convert hFP to sFP for arithmetical operations and reconvert the results to hFP before storing it. The influence of successive conversions when simulating SNN is the main concern of this article. Three methods were used to evaluate the impact of hFP on SNNs: (i) F-I curve, (ii) subthreshold regime, and (iii) the time for the next spike. We have tested the leaky integrate-and-fire and the Izhikevich's neuron model; both presented similar results. The data show that SNNs simulated with sFP present equivalent results when compared to the ones simulated with hFP with identical topology. Such results are important because hFP requires half of the memory space, simpler buses, and lower bandwidth for transferring data. We may infer they require lower clock frequency consequently lower power consumption. These are essential factors for real-time simulation of SNN on embedded electronics. The sFP to hFP conversion circuits, and vice versa, may be implemented using few logical blocks in a field-programmable gate arrays (FPGA) with no relevant Iatency. We conclude that data in the hFP format are suitable for SNNs synthesized in FPGAs, even though such implementations require conversion circuits.
机译:研究了在尖刺神经网络(SNN)模拟中使用半精密浮点数(HFP)。 HFP格式成功用于计算机图形和视频游戏,用于存储和数据传输。 IEEE 754-2008标准稳定该算术运算必须至少在单精度浮点格式(SFP)上发生。这意味着有必要将HFP转换为SFP进行算术操作,并在存储之前将结果重新转换为HFP。在模拟SNN时,连续转换的影响是本文的主要关注点。三种方法用于评估HFP对SNNS的影响:(i)F-I曲线,(ii)亚阈值制度,以及(iii)下一个尖峰的时间。我们已经测试了泄漏的整合和火灾和Izhikevich的神经元模型;两者都呈现了类似的结果。数据显示,与具有相同拓扑的HFP模拟的SFP与SFP的SNNS模拟了等效结果。这种结果很重要,因为HFP需要一半的内存空间,更简单的总线,以及用于传输数据的较低带宽。我们可以推断它们需要更低的时钟频率,因此降低功耗。这些是嵌入式电子产品实时仿真的必要因素。可以在现场可编程门阵列(FPGA)中使用几个逻辑块来实现SFP到HFP转换电路,反之亦然,并且没有任何相关的Intence。我们得出结论,HFP格式中的数据适用于在FPGA中合成的SNN,即使这些实现需要转换电路。

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