We propose a new power simulation technique that effectively considers dynamic program execution behaviors such as cache hit/miss or branch predicted/mis-predicted and achieves fast and accurate power estimation results. Traditionally, accurate software power estimation relies on slower fine-grained simulations while faster coarse-grained simulations often lead to inaccurate estimation results. We pre-characterize detailed circuit power consumption, pipeline and branch effects of each basic block for accuracy and then apply efficient instruction-set simulators to compute total software power consumption. The experimental result shows that our approach achieves over 200 MIPS performance with a less than 3% error rate.
展开▼
