FPGA implementation of a new scheme for the circuit realization of PWL functions

摘要

A new scheme for the circuit realization of multi-variate PWL functions is proposed. A three-variate version is implemented on an FPGA board. A comparison with respect to another scheme, already implemented on chip, is provided, showing that the new scheme is more complex, but reduces the computation times. Two benchmark examples are considered to show the high accuracy of the circuit in the representation of PWL functions.