The effect of supply voltage reduction to 5.8-GHz differential dual-modulus prescaler

摘要

We have measured the noise floor of spectrum and phase noise of the proposed differential dual-modulus 10/11 prescaler based on ILFD for various supply voltages and found that spurious noises arise and the phase noise degrades as the supply voltage reduces. The differential dual-modulus prescaler is implemented in 130 nm CMOS process and the core size is 40 × 20 µm2.