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Adapting voltage ramp-up time for temperature noise reduction on memory-based PUFs

机译:调整电压上升时间以降低基于存储器的PUF的温度噪声

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The efficiency and cost of silicon PUF-based applications, and in particular key generators, are heavily impacted by the level of reproducibility of the bare PUF responses under varying operational circumstances. Error-correcting codes can be used to achieve near-perfect reliability, but come at a high implementation cost especially when the underlying PUF is very noisy. When designing a PUF-based key generator, a more reliable PUF will result in a less complex ECC decoder and a smaller PUF footprint, hence an overall more efficient implementation. This paper proposes a novel insight and resulting technique for reducing noise on memory-based PUF responses, based on adapting supply voltage ramp-up time to ambient temperature. Circuit simulations on 45nm Low-Power CMOS, as well as actual silicon measurements are presented to validate the proposed methods. Our results demonstrate that choosing an appropriate voltage ramp-up for enrollment and adapting it according to the ambient temperature at key-reconstruction is a powerful method which makes memory-based PUF response noise up to three times smaller.
机译:基于硅PUF的应用的效率和成本,特别是关键发生器,受到不同操作情况下裸PUF响应的再现性的影响严重影响。纠正纠正码可用于实现近乎完美的可靠性,但尤其是当潜在的PUF非常嘈杂时出现高的实现成本。在设计基于PUF的密钥生成器时,更可靠的PUF将导致更复杂的ECC解码器和更小的PUF占用占地面积,因此整体更有效地实现。本文提出了一种新的洞察力和导致技术,用于降低基于存储器的PUF响应的噪声,基于适应电源电压升高时间到环境温度。电路模拟45nm低功耗CMOS,以及实际硅测量以验证所提出的方法。我们的结果表明,根据关键重建的环境温度选择适当的电压升压和适应它,是一种强大的方法,使基于内存的PUF响应噪声变小三倍。

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