A Sub-mW All-Passive RF Front End with Implicit Capacitive Stacking Achieving 13 dB Gain, 5 dB NF and +25 dBm OOB-IIP3

摘要

This paper presents a sub-mW mixer-first RF front-end that exploits a novel capacitive stacking technique in an altered bottom-plate N-path filter/mixer to achieve passive voltage gain and high-linearity at low noise figure. Capacitive stacking is realized implicitly by reading out the voltage from the bottom-plate of N-path capacitors instead of their top-plate, which provides a 2x gain at the read-out capacitors. Additional passive voltage gain is achieved using impedance upconversion while improving the out-of-band linearity performance of small switches. With no other active circuitry, only clock generation circuits determine the total power consumption of this RF front-end. A prototype is fabricated in GF22 nm FDSOI technology. Operating at f_LO= 1 GHz, the prototype achieves a voltage gain of 13 dB, 5 dB Noise Figure and +25/+66 dBm Out-of-band IIP3/IIP2 at 160 MHz offset while consuming only 600 μW of power from a 0.8 V supply.